Course Details
Course Details
What You'll Learn
Topic 1: Introduction to FPGA
Cyclone/Stratix device Architecture
Introduction to Quartus II
Creating Project
Using Editor & Design Entry
Topic 2: Analysis and Elaboration
I/O Assignment
Configure voltage for I/0
I/O Assignment Analysis
Synthesis
Netlist Viewer
Topic 3: Constraints
Importance of Constraints in Design
Clock frequency
Asynchronous & Synchronous Design
False Path/Multicycle path
Topic 4: Debugging Tools
Power Analysis
SignalTap II embedded logic analyzer
JTAG Chain Debug Tool
In-System Memory Content Editor
Topic 5: Placing Design in FPGA
Fitter (Place & Route)
Chip Planner
Assembler (Generating Programming file)
Downloading Design in FPGA
Topic 6: Static Time analysis (STA)
Running TimeQuest Timing Analyzer
Understanding reports
Understand setup/hold violation & failing paths
Constraining and understanding TCL Commands
Course Info
Promotion Code
Your will get 10% discount voucher for 2nd course onwards if you write us a Google review.
Minimum Entry Requirement
Knowledge and Skills
- Able to operate using computer functions
- Minimum 3 GCE ‘O’ Levels Passes including English or WPL Level 5 (Average of Reading, Listening, Speaking & Writing Scores)
Attitude
- Positive Learning Attitude
- Enthusiastic Learner
Experience
- Minimum of 1 year of working experience.
Target Age Group: 18-65 years old
Minimum Software/Hardware Requirement
Software:
TBD
Hardware: Window or Mac Laptops
Job Roles
Job Roles
- Digital IC Aesigners
- VHDL/VERILOG Arogrammers
- FPGA Architects
- Embedded design Engineers
Trainers
Trainers
Saeid is co-founder of Skymics Sdn Bhd. He has 8 years of experience in the field of IoT (Internet of Things) and Information Technology. He is a certified IBM IoT Practitioner and instructor, and a Certified Citizen Data Scientist Train-The-Trainer. He has been co-inventor of 3 inventions during the last 4 years.